Intel’s FAB 32 is a $3 billion factory situated in Arizona.This factory is responsible for the one of the most complicated electrical engineering process of Modern days.FAB32 producing processors by using components of size measures only 4.5 millionths of a milli meter.But the main speciality ofthis process is that these tiny components are made from nothing but from sand.The conversion process is difficult.

CONVERSION OF SAND TO SILICON

The type of sand that is used for the  production of silicon is the  purest  form of sand  known as silica sand. It can be recovered from common sand  by quarrying process.

To extract silicon from silica,the presence of oxygen must be removed.It can be achieved  by heating a mixture of carbon and silica in an electric furnace to a temperature of 2,000°C.

The oxygen in the molten silica will react with the carbon producing  silicon and  carbon dioxide. It will settles at the bottom of the electric  furnace. The final product of this process is a substance called metallurgical grade silicon. It will have a purityof about 99%.

But for semiconductor manufacturing , we need to refine the metallurgical grade silicon again. The silicon produced  is converted to a fine powder and allow to  react with gaseous hydrogen chloride in side  a fluidised bed reactor at atemperature of  300°C.It will produce a  liquid form of silicon known as trichlorosilane.The remaining impurities from the product is removed by fractional distillation.The trichlorosilane again react with the hydrogen gas at 1100°C to produce the 99.999999 pure silicon

CREATING A CYLINDRICAL CRYSTAL

The produced silicon will have polycrystalline structure.This structure will affect the electronic behaviour.So this form ofsilicon is not good for semiconductor production.The silicon must have a regular atomic structure. It will be achieved by Czochralski Process.

First the silicon is allowed to melt in side  a rotating quartz crucible. It will held in that condition  at  above its melting point ,that is 1414°C.Then a tiny silicon is allowed to dip in to the molten silicon.It will continuously rotated in the opposite direction that of the crucible.This process will produce a  “boule” which will measure 300mm in diameter.

SLICING THE CRYSTAL IN TO WAFERS

To increase the surface area of the cylindrical shaped  silicon, the boule must be sliced up into wafers.

The wafers will allow to be handled safely during semiconductor production. 300m wafers are typically 0.775mm thick.  Then the  sharp edges of wafers  are smoothed down to prevent the chipping of wafers  in the later processes.

Then the wafers will under go “lapping” process in which about  2 micrometer flat wafers are produced by using an abrasive slurry. This flat wafers are allowed to etched in a mixture of hydrochloric,nitric and acetic acids.The final product will be a thin,smooth and clean surface.

CREATING AN OXIDE LAYER

A multistage process is used to createTo create  an oxide layer in the form of the required circuit a multi stage process is necessary

First the thin wafer is allowed to heat inside a furnace at a very high temperature producing silicon dioxide.

Then a thin layer of photoresist is applied at the surface of the wafer.The wafer with photoresist layer  is allowed to expose to the  ultraviolet light by using a photographic film. This film shows the required circuit features.

Then by using the alkaline solution a latent circuit image is produced.During this process most of the photoresist layer will be removed from the wafer and can be washed away.

The remaining photoresist can be remove by using a solvent. The final product will be a thin oxide layer with the required circuit features.

CREATING P-TYPE AND N-TYPE REGIONS

The main building block of the tiny  processor is a transistor called MOSFET.This transistor is used to create the n-type and p-type regions.

MOSFET DESIGN

Now the wafer is allowed to expose to a boron beam of  ions. This will allow to create areas called “P-WELLS”.

Then a different photoresist pattern is applied at the surface, and a phosphorous beam of  ions is used to create areas called ‘N-WELLS’

Then by  using another photoresist film and another beam of phosphorous ions an n type region is produced at the p-well region.It will act like a drain and source for the n-channel MOSFET.

Then a  thin layer of silicon germanium doped with boron material (p-type material) is applied at the surface.Now need to produce the gate region for the circuit.By using the CVD process, a very thin layer of silicon dioxide is deposited between the drain and the source,which will act like the gate region.

CONNECTING THE MOSFETs  WITH COPPER TRACKS

The  final wafer may contain billions of MOSFETs in it.We need to connect them together as a circuit,then they will work together and will  produce large number of individual chips.

Before adding the copper circuitry ,the complete surface of the wafer is covered using an insulating layer of silicon dioxide.For to produce the connections need to use a method called “double damascene”.

It has 2 steps.One is to make the copper inter connects and the second one is to make the tungsten connecting pins.

Holes(etching) are produced  in the silicon dioxide insulation using hydrochloric acid.

Then the copper is applied in to the system  by using electroplating. This fills the holes and trenches to make contact with the MOSFETs. The final  metallic pins that produced by this process are called  ’vias’.

By using the process called chemical mechanical polishing the remaining copper is removed from the surface.And the connection process is completed.

The MOSFET will have several metallic layer in it ,each will have a layer of silicon dioxide which are connected using “VIAS”.

PACKING THE CHIPS

The final stage is packing the bare chip in to a proper package.There are so many methods are available for the packing process,through which the die is firmly attached to the package.Between the contacts on the die and the package electrical connections are made.